/* src = "../example/serial2parallel_2.v:1.1-32.10" */
module serial2parallel(clk, rst_n, data_in, valid_i, data_o, valid_o);

  wire [7:0] _000_;
  wire _001_;
  wire _002_;
  wire _003_;
  wire _004_;
  wire _005_;
  wire _006_;
  wire _007_;
  wire _008_;
  wire _009_;
  wire _010_;
  wire _011_;
  wire _012_;
  wire _013_;
  wire _014_;
  wire _015_;
  wire _016_;
  wire _017_;
  wire _018_;
  wire _019_;
  wire _020_;
  wire _021_;
  wire _022_;
  wire _023_;
  wire _024_;
  wire _025_;
  
  wire [7:0] _026_;
  
  wire [7:0] _027_;
  wire [2:0] _028_;
  
  
  wire [31:0] _029_;
  
  
  wire [7:0] _030_;
  
  
  wire [7:0] _031_;
  
  
  
  wire [2:0] _032_;
  
  
  wire [2:0] _033_;
  
  
  wire [2:0] _034_;
  
  
  wire [31:0] _035_;
  
  
  wire [31:0] _036_;
  
  
  wire [23:0] _037_;
  
  wire [23:0] _038_;
  
  wire [23:0] _039_;
  
  
  wire [23:0] _040_;
  
  
  wire [23:0] _041_;
  
  wire [23:0] _042_;
  
  wire [23:0] _043_;
  
  wire [23:0] _044_;
  
  
  wire [23:0] _045_;
  
  input clk;
  wire clk;
  
  reg [2:0] cnt;
  
  input data_in;
  wire data_in;
  
  output [7:0] data_o;
  reg [7:0] data_o;
  
  input rst_n;
  wire rst_n;
  
  input valid_i;
  wire valid_i;
  
  output valid_o;
  wire valid_o;
  
  always @(posedge clk)
    data_o[0] <= _004_;
  
  always @(posedge clk)
    data_o[1] <= _006_;
  
  always @(posedge clk)
    data_o[2] <= _008_;
  
  always @(posedge clk)
    data_o[3] <= _010_;
  
  always @(posedge clk)
    data_o[4] <= _012_;
  
  always @(posedge clk)
    data_o[5] <= _014_;
  
  always @(posedge clk)
    data_o[6] <= _016_;
  
  always @(posedge clk)
    data_o[7] <= _018_;
  
  always @(posedge clk)
    cnt[0] <= _020_;
  
  always @(posedge clk)
    cnt[1] <= _022_;
  
  always @(posedge clk)
    cnt[2] <= _024_;
  assign _003_ = _001_ ? _027_[0] : data_o[0];
  assign _005_ = _001_ ? _027_[1] : data_o[1];
  assign _007_ = _001_ ? _027_[2] : data_o[2];
  assign _009_ = _001_ ? _027_[3] : data_o[3];
  assign _011_ = _001_ ? _027_[4] : data_o[4];
  assign _013_ = _001_ ? _027_[5] : data_o[5];
  assign _015_ = _001_ ? _027_[6] : data_o[6];
  assign _017_ = _001_ ? _027_[7] : data_o[7];
  assign _019_ = valid_i ? _028_[0] : cnt[0];
  assign _021_ = valid_i ? _028_[1] : cnt[1];
  assign _023_ = valid_i ? _028_[2] : cnt[2];
  assign _004_ = rst_n ? _003_ : 1'h0;
  assign _006_ = rst_n ? _005_ : 1'h0;
  assign _008_ = rst_n ? _007_ : 1'h0;
  assign _010_ = rst_n ? _009_ : 1'h0;
  assign _012_ = rst_n ? _011_ : 1'h0;
  assign _014_ = rst_n ? _013_ : 1'h0;
  assign _016_ = rst_n ? _015_ : 1'h0;
  assign _018_ = rst_n ? _017_ : 1'h0;
  assign _020_ = rst_n ? _019_ : 1'h0;
  assign _022_ = rst_n ? _021_ : 1'h0;
  assign _024_ = rst_n ? _023_ : 1'h0;
  assign _033_[0] = ~cnt[0];
  assign _025_ = _033_[0] |  _035_[1];
  assign _002_ = _025_ |  _035_[2];
  assign _001_ = valid_i & _002_;
  assign valid_o = ~ _002_;
  assign _028_[0] = _002_ ?  _033_[0] : 1'h0;
  assign _028_[1] = _002_ ?  _034_[1] : 1'h0;
  assign _028_[2] = _002_ ?  _034_[2] : 1'h0;
  assign _030_[0] = _036_[31] ?  _040_[0] : 1'h0;
  assign _030_[1] = _036_[31] ?  1'h0 : _037_[1];
  assign _030_[2] = _036_[31] ?  1'h0 : _037_[2];
  assign _030_[3] = _036_[31] ?  1'h0 : _037_[3];
  assign _030_[4] = _036_[31] ?  1'h0 : _037_[4];
  assign _030_[5] = _036_[31] ?  1'h0 : _037_[5];
  assign _030_[6] = _036_[31] ?  1'h0 : _037_[6];
  assign _030_[7] = _036_[31] ?  1'h0 : _037_[7];
  assign _040_[0] = _029_[2] ?  1'h0 : _039_[0];
  assign _037_[1] = _029_[2] ?  _039_[13] : 1'h0;
  assign _037_[2] = _029_[2] ?  _039_[14] : 1'h0;
  assign _037_[3] = _029_[2] ?  _039_[15] : 1'h0;
  assign _037_[4] = _029_[2] ?  _039_[16] : 1'h0;
  assign _037_[5] = _029_[2] ?  1'h0 : _039_[13];
  assign _037_[6] = _029_[2] ?  1'h0 : _039_[14];
  assign _037_[7] = _029_[2] ?  1'h0 : _039_[15];
  assign _039_[0] = _029_[1] ?  1'h0 : _038_[0];
  assign _039_[13] = _029_[1] ?  _038_[15] : 1'h0;
  assign _039_[14] = _029_[1] ?  _038_[16] : 1'h0;
  assign _039_[15] = _029_[1] ?  1'h0 : _038_[15];
  assign _039_[16] = _029_[1] ?  1'h0 : _038_[16];
  assign _038_[0] = cnt[0] ?  1'h0 : _036_[31];
  assign _038_[15] = cnt[0] ?  _029_[31] : 1'h0;
  assign _038_[16] = cnt[0] ?  1'h0 : _029_[31];
  assign _029_[31] = ~ _036_[31];
  assign _031_[0] = _036_[31] ?  _045_[0] : 1'h0;
  assign _031_[1] = _036_[31] ?  1'h0 : _041_[1];
  assign _031_[2] = _036_[31] ?  1'h0 : _041_[2];
  assign _031_[3] = _036_[31] ?  1'h0 : _041_[3];
  assign _031_[4] = _036_[31] ?  1'h0 : _041_[4];
  assign _031_[5] = _036_[31] ?  1'h0 : _041_[5];
  assign _031_[6] = _036_[31] ?  1'h0 : _041_[6];
  assign _031_[7] = _036_[31] ?  1'h0 : _041_[7];
  assign _045_[0] = _029_[2] ?  1'h0 : _044_[0];
  assign _041_[1] = _029_[2] ?  _044_[13] : 1'h0;
  assign _041_[2] = _029_[2] ?  _044_[14] : 1'h0;
  assign _041_[3] = _029_[2] ?  _044_[15] : 1'h0;
  assign _041_[4] = _029_[2] ?  _044_[16] : 1'h0;
  assign _041_[5] = _029_[2] ?  1'h0 : _044_[13];
  assign _041_[6] = _029_[2] ?  1'h0 : _044_[14];
  assign _041_[7] = _029_[2] ?  1'h0 : _044_[15];
  assign _044_[0] = _029_[1] ?  1'h0 : _043_[0];
  assign _044_[13] = _029_[1] ?  _043_[15] : 1'h0;
  assign _044_[14] = _029_[1] ?  _043_[16] : 1'h0;
  assign _044_[15] = _029_[1] ?  1'h0 : _043_[15];
  assign _044_[16] = _029_[1] ?  1'h0 : _043_[16];
  assign _043_[0] = cnt[0] ?  1'h0 : _042_[0];
  assign _043_[15] = cnt[0] ?  _042_[16] : 1'h0;
  assign _043_[16] = cnt[0] ?  1'h0 : _042_[16];
  assign _042_[0] = _036_[31] ?  data_in : 1'h0;
  assign _042_[16] = _036_[31] ?  1'h0 : data_in;
  assign _035_[1] = ~ cnt[1];
  assign _035_[2] = ~ cnt[2];
  assign _026_[0] = ~ _030_[0];
  assign _026_[1] = ~ _030_[1];
  assign _026_[2] = ~ _030_[2];
  assign _026_[3] = ~ _030_[3];
  assign _026_[4] = ~ _030_[4];
  assign _026_[5] = ~ _030_[5];
  assign _026_[6] = ~ _030_[6];
  assign _026_[7] = ~ _030_[7];
  assign _034_[1] = cnt[1] ^  cnt[0];
  assign _034_[2] = cnt[2] ^  _032_[1];
  assign _036_[1] = _035_[1] &  _033_[0];
  assign _036_[31] = _035_[2] &  _036_[1];
  assign _032_[1] = cnt[1] &  cnt[0];
  assign _000_[0] = data_o[0] &  _026_[0];
  assign _000_[1] = data_o[1] &  _026_[1];
  assign _000_[2] = data_o[2] &  _026_[2];
  assign _000_[3] = data_o[3] &  _026_[3];
  assign _000_[4] = data_o[4] &  _026_[4];
  assign _000_[5] = data_o[5] &  _026_[5];
  assign _000_[6] = data_o[6] &  _026_[6];
  assign _000_[7] = data_o[7] &  _026_[7];
  assign _027_[0] = _000_[0] |  _031_[0];
  assign _027_[1] = _000_[1] |  _031_[1];
  assign _027_[2] = _000_[2] |  _031_[2];
  assign _027_[3] = _000_[3] |  _031_[3];
  assign _027_[4] = _000_[4] |  _031_[4];
  assign _027_[5] = _000_[5] |  _031_[5];
  assign _027_[6] = _000_[6] |  _031_[6];
  assign _027_[7] = _000_[7] |  _031_[7];
  assign _029_[1] = _035_[1] ^  _033_[0];
  assign _029_[2] = _035_[2] ^  _036_[1];
  assign { _029_[30:3], _029_[0] } = { _029_[31], _029_[31], _029_[31], _029_[31], _029_[31], _029_[31], _029_[31], _029_[31], _029_[31], _029_[31], _029_[31], _029_[31], _029_[31], _029_[31], _029_[31], _029_[31], _029_[31], _029_[31], _029_[31], _029_[31], _029_[31], _029_[31], _029_[31], _029_[31], _029_[31], _029_[31], _029_[31], _029_[31], cnt[0] };
  assign _032_[0] = cnt[0];
  assign _033_[2:1] = cnt[2:1];
  assign _034_[0] = _033_[0];
  assign { _035_[31:3], _035_[0] } = { 29'h1fffffff, _033_[0] };
  assign { _036_[30:2], _036_[0] } = { _036_[31], _036_[31], _036_[31], _036_[31], _036_[31], _036_[31], _036_[31], _036_[31], _036_[31], _036_[31], _036_[31], _036_[31], _036_[31], _036_[31], _036_[31], _036_[31], _036_[31], _036_[31], _036_[31], _036_[31], _036_[31], _036_[31], _036_[31], _036_[31], _036_[31], _036_[31], _036_[31], _036_[31], _036_[31], _033_[0] };
  assign { _037_[23:9], _037_[0] } = 16'h0000;
  assign { _038_[23:17], _038_[14:1] } = 21'h000000;
  assign { _039_[23:17], _039_[12:1] } = 19'h00000;
  assign _040_[23:1] = { 7'h00, _037_[8:1], 8'h00 };
  assign { _041_[23:9], _041_[0] } = 16'h0000;
  assign { _042_[23:17], _042_[15:1] } = 22'h000000;
  assign { _043_[23:17], _043_[14:1] } = 21'h000000;
  assign { _044_[23:17], _044_[12:1] } = 19'h00000;
  assign _045_[23:1] = { 7'h00, _041_[8:1], 8'h00 };
endmodule
